Agent skills
Skills you can use with AI coding agents, indexed from public GitHub repositories.
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verilog-sv-language
Expert-level Verilog and SystemVerilog knowledge following IEEE 1800 standards. Generates synthesizable RTL code with proper coding styles and constructs.
a5c-ai/babysitter 514
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synthesis-optimization
Expertise in RTL optimization for FPGA synthesis tools. Analyzes synthesis reports, applies attributes, and guides resource inference for optimal QoR.
a5c-ai/babysitter 514
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timing-constraints
Expert skill for developing and validating timing constraints. Writes SDC (Synopsys Design Constraints) and XDC files for FPGA timing closure.
a5c-ai/babysitter 514
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vhdl-language
Deep expertise in VHDL language constructs, IEEE 1076 standard compliance, and synthesis coding guidelines. Expert skill for generating synthesizable VHDL code.
a5c-ai/babysitter 514
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hdl-simulation
Multi-simulator expertise for functional verification of FPGA designs
a5c-ai/babysitter 514
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rtl-linting
RTL code quality checking and linting. Runs lint rules, identifies synthesis issues, detects inferred latches, and generates lint reports with waivers.
a5c-ai/babysitter 514
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power-analysis
FPGA power estimation and optimization skill for low-power design
a5c-ai/babysitter 514
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fpga-debugging
On-chip debugging skill with ILA, VIO, and related FPGA debug tools
a5c-ai/babysitter 514
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ip-core-management
Vendor IP core configuration and integration expertise for FPGA designs
a5c-ai/babysitter 514
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memory-interfaces
Expert skill for on-chip and external memory interface design in FPGAs
a5c-ai/babysitter 514
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uvm-methodology
Deep expertise in Universal Verification Methodology (IEEE 1800.2) for FPGA verification
a5c-ai/babysitter 514
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hls-cpp-to-rtl
Expert skill for C/C++ to RTL conversion using High-Level Synthesis tools
a5c-ai/babysitter 514
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cdc-analysis
Specialized skill for clock domain crossing analysis and synchronizer design in FPGA designs
a5c-ai/babysitter 514
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fsm-design
Specialized skill for finite state machine design and optimization in FPGAs
a5c-ai/babysitter 514
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axi-protocol
Expert skill for AMBA AXI protocol implementation and verification in FPGA designs
a5c-ai/babysitter 514
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place-and-route
Expert skill for FPGA place and route optimization and physical implementation
a5c-ai/babysitter 514
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formal-verification
Formal property verification and model checking skill for FPGA designs
a5c-ai/babysitter 514
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optuna-hyperparameter-tuner
Optuna integration skill for automated hyperparameter optimization with advanced search strategies, pruning, multi-objective optimization, and visualization capabilities.
a5c-ai/babysitter 514
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whylabs-monitor
WhyLabs integration skill for ML observability, profile logging, and anomaly detection.
a5c-ai/babysitter 514
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pytorch-trainer
PyTorch model training skill with custom training loops, gradient management, and GPU optimization.
a5c-ai/babysitter 514
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shap-explainer
SHAP-based model explainability skill for feature attribution, summary plots, and interaction analysis.
a5c-ai/babysitter 514
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tensorflow-trainer
TensorFlow/Keras model training skill with callbacks, distributed strategies, and TensorBoard integration.
a5c-ai/babysitter 514
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jupyter-notebook-executor
Jupyter notebook execution skill for running notebooks programmatically and extracting outputs.
a5c-ai/babysitter 514
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model-card-generator
Model documentation skill for generating model cards following Google's model card framework.
a5c-ai/babysitter 514